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AMD Developer News
AMD Capsaicin SIGGRAPH to Showcase new Professional-Class Radeon Products
CapsaicinAMD will present a marquee “Capsaicin” event for content creators, press and partners hosted by Radeon Technologies Group’s Senior Vice President and Chief Architect Raja Koduri on Monday, July 25, 2016 at 6:30 PM PDT at SIGGRAPH 2016. Watch it on the AMD YouTube channel.


 
The Art of AMDGCN Assembly: How to Bend the Machine to Your Will
The ability to write code in assembly is essential to achieving the best performance for a GPU program. This article, co-authored with Ilya Perminov of Luxsoft , explains how to produce Hsaco from assembly code, and takes a closer look at some new features of the GCN architecture.


 
Compressonator v2.3 Release Delivers
Compressonator is an open source set of tools to allow artists and developers to more easily create compressed texture image assets and easily visualize the quality impact of various compression technologies. Version 2.3 is out and includes ASTC, ETC2 codec support, GPU rendered image views and more.


 

Radeon Software Crimson Edition 16.7.2 is out! It includes support for DOOM® (with Vulkan™ API) and more.
Learn more here

CONFERENCE & EVENTS◢

SIGGRAPH 2016
Anaheim, California,
July 24-28, 2016


VRLA Summer Expo
Los Angeles, CA,
August 5-6, 2016


GDC Europe 2016
Cologne, Germany,
August 15-16, 2016


Hot Chips
Cupertino, CA
August 21-23, 2016


 

TRAINING & EDUCATION◢

OpenCL Training in Munich with Acceleware, Sept. 2016


OpenCL Training in Calgary with Acceleware, Dec. 2016


Design Engineer
Austin, TX


Software Engineer
Boxborough, Massachusetts

Extending Support for In-Place Transpose to Compute FFTs Without Using Extra Memory
Many FFT algorithms implement an intermediate transpose stage. Traditionally, the transpositions have used an out-of-place approach in the clFFT library – that is, the library allocates a temporary buffer to store the transposed result. Recent efforts sought to eliminate this temporary buffer by employing in-place transpose. Did they succeed? And why would you care?


 
DX12 Performance Blog Series: Debugging & Robustness
Prior to explicit graphics APIs a lot of draw-time validation was performed to ensure that resources were synchronized and everything set up correctly. A side-effect of this robustness was a direct impact on overall CPU overhead. Direct3D® 12 and Vulkan™ were designed for minimal driver overhead, and therefore rely on the application to do “the right thing.” Performance is paramount, and while this is great for a final, shipping application, it also means that additional help is needed during development for debugging and checking.


 
ROCm with Rapid Harmony: Optimizing HSA Dispatch
We previously looked at how to launch an OpenCL™ kernel using the HSA runtime. That example showed the basics of using the HSA Runtime. Here we’ll turn up the tempo a bit by optimizing the launch code.


 
Everything You Wanted to Know about the HSA 1.1 Spec
IEEE Computing takes a look at the recent HSA 1.1 specification, some of the key features, and how it is bringing heterogeneous computing to a wide array of platforms.


 
Stay in Touch
Follow us on Twitter @AMDDevCentral to get the latest developer focused news about tools, libraries, SDKs, training, events, GPUOpen, HPC and more.


 
 
 
 
It's Time to ROC
 
Watch Video »
 
 
Using VR to treat PTSD
 
Watch Video »
 
 
DOOM® Vulkan™ Tested
 
Watch Video »
 
 
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